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Old Apr 16, 2021, 09:54 PM   #423
demo
space cadet
 
Join Date: Sep 2007
Location: Australia Melbourne
Posts: 27,544
demo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Dieseldemo exchanges holiday cards with Vin Diesel


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Just worked out it's because I had AVX512 disabled. When enabled L1 cache scores are back in the 4.5-5k range.


I've settled on 54/52, but using a +1 bin for all core only - so if TVB feels inclined, it can boost all core to 53. This way max possible clocks are 54 2c/53 all core.


As for IPC, crack that 750 ST Adam

https://valid.x86.fr/em5i7f
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